蒙哥马利模乘算法改进及硬件实现

An Improved Montgomery Modular Multiplication Algorithm and Its Hardware Implementation

在嵌入式和物联网等领域的加密应用场景中,需要在加密实现的性能和资源消耗之间找到综合效率最佳的平衡点.模乘法器是Rivest-Shamir-Adleman算法(RSA)和椭圆曲线密码(ECC)等公钥密码算法的核心运算模块,其资源占用和运算速度直接影响上层密码算法的整体性能.本文提出高效低延迟的蒙哥马利模乘算法可以有效降低运算量,减少硬件设计的复杂度,结合使用提出的5-2低延迟加法器进一步降低模乘法器的关键路径长度,从而提高算法的运行效率.在Xilinx-K7系列平台上实现的1024位模乘运算模块系统主频可达278 MHz,同时面积时间积(ATP)比已有同类算法提高了15%以上,综合效率表现最优.结果表明,改进后的蒙哥马利模乘算法硬件资源消耗低,适用于物联网等轻量级密码系统.

In cryptographic application scenarios such as embedded and IoT,it is necessary to balance the performance and resource consumption of cryptographic implementation to find the best balance of comprehensive efficiency.As the core computing module of public key cryptographic algorithms such as Rivest-Shamir-Adleman algorithm(RSA)and elliptic curve cryptography(ECC),the resource consumption and computing speed of the modulo multiplier directly determine the overall performance of the upper layer cryptographic algorithms.The proposed efficient low-latency Montgomery modulo multiplication was designed to effectively reduce the amount of operations and the complexity of hardware design.On this basis,the length of the critical path in the modulo multiplier was arranged to be further reduced by using the proposed 5-2 low-latency adder in combination to improve the algorithm operation efficiency.The system main frequency of the 1024-bit modulo module implemented on the Xilinx-K7 series platform can reach 278 MHz,while the area-time-product(ATP)is improved by more than 15%compared with the existing similar algorithms,and the overall efficiency is optimal.The results show that the improved Montgomery modulo multiplication algorithm can give a low hardware resource consumption,being suitable for lightweight cryptosystems such as IoT.