基于FPGA的图像处理硬件加速系统的设计

Design of image processing hardware acceleration system based on FPGA

为解决图像处理算法越来越复杂,普通的计算平台已满足不了当前需求的问题,根据现场可编程门阵列(field programmable gate array, FPGA)的并行计算特点对FAST角点检测算法和Sobel边缘检测算法进行硬件加速,采用HLS(high-level synthesis, HLS)高层次综合技术对两种算法进行设计并进行相应的优化。为提升系统整体性能,在FPGA上实现全部视频输入输出接口和图像算法的完整通路,通过FPGA算法电路与OpenCV算法程序进行对比,前者的图像处理速度快于后者9~11倍,系统功耗也仅为1.9 W,图像检测可达56 fps,满足实时图像处理要求,为以后设计复杂的图像处理系统提供了参考。

To solve the problems that image processing algorithms are becoming more and more complex and ordinary computing platforms can no longer meet the current needs,the FAST corner detection algorithm and Sobel edge detection algorithm were hardware-accelerated according to the parallel computing characteristics of field programmable gate array(FPGA),and the two algorithms were designed and optimized using HLS(high level synthesis)technology.To improve the overall performance of the system,all video input and output interfaces and the complete path of the image algorithm were implemented on the FPGA,and the FPGA algorithm circuit was compared with the OpenCV algorithm program.The former is 9-11 times faster than the latter,and the system consumes only 1.9 W and the image detection can be up to 56 fps,which meets the requirement of real-time image processing,and provides a reference for designing complex image processing system in the fature.