3Rowen C- Engineering the Complex SoC - Fast, Flexible Design with Confignrable Processors[M]. Prentice Hall, Upper Saddle River, NJ, 2004.
4Yang P, Wong C, Marchal P, et al. Energy - aware Runtime Scheduling for Embedded Multi - processor SoCs[J].IEEE Design and Test of Computers, 2001,18 (5) : 46 - 58.
5[1]Power Compiler User Guide, Reference Manual Release 2002.05[Z]. Synopsys Inc.
6[2]Garrett D, Stan M, Dean A. Challenges in clockgating for a low power ASIC methodology [A]. IEEE, International Symposium on Low Power Electronics and Design, 1999[C],San Diego, CA, USA: IEEE, 1999: 176～181.
7[3]Kitahara T, Minami F, Ueda T, et al. A clock-gating method for low-power LSI design [A]. IEEE, Proceedings of the ASP-DAC'98[C], Yokohama, Japan, 1998, IEEE, 1998:307～312.
