基于XC7V690T的在轨抗单粒子翻转系统设计

System Design of On-orbit Anti-SEU Based on XC7V690T

针对核心工业级SRAM型FPGA芯片XC7V690T抗辐照能力较弱、在轨运行期间存在较高单粒子翻转风险的问题,为了提高XC7V690T在轨抗单粒子翻转的能力及配置文件注数修改的灵活性,设计了一种基于XC7V690T的在轨抗单粒子翻转系统架构;其硬件架构主要由XC7V690TSRAM型FPGA芯片、AX500反熔丝型FPGA芯片以及多片FLASH组成;软件架构主要包括AX500反熔丝型FPGA对XC7V690T进行配置管理及监控管理,对XC7V690T进行在轨重构管理,XC7V690T通过调用内部SEM IP核实现对配置RAM资源的自主监控和维护;在轨实验结果表明,采用工业级SRAM型FPGA芯片XC7V690T的某航天器通信机在轨测试过程中成功进行了SEM纠错,通信机在轨工作正常,通信链路稳定,满足使用要求,表明该系统架构可以有效提升XC7V690T抗单粒子翻转能力,可以为其他SRAM型FPGA抗单粒子翻转设计提供借鉴与参考。

Aiming at the problem that the core industrial SRAM-based field programmable gate array(FPGA)chip XC7V690T has the weak anti-irradiation capability and risk of single-event upsets(SEU)during the periods of on-orbit operation,in order to improve the on-orbit anti-SEU capability of industrial SRAM-based FPGA chip XC7V690T and the flexibility of configuration file for modification,an on-orbit anti-SEU system architecture based on XC7V690T chip is designed.The hardware architecture is mainly composed of XC7V690T SRAM-based FPGA chip,AX500 anti-fuse FPGA chip and multiple FLASH chips.The software architecture mainly includes XC7V690T chip configuration management and monitoring management on AX500 anti-fuse FPGA,the autonomous monitoring and maintenance on configuration RAM resource are achieved in XC7V690T chip by calling the inner core soft error mitigation(SEM)IP On-orbit test verification results show that based on industrial SRAM-based FPGA chip,the SEM error correction of the spacecraft communicator is carried out successfully during the periods of on-orbit operation,and the spacecraft communicator is running normally in orbit,the communication link is stable,which meets the need of application,the test results show that the system architecture can effectively improve the anti-SEU capability of XC7V690Tchip,which can provide a reference of anti-SEU design for other SRAM-based FPGA.