RISC-V AIA中断控制器的设计与评估

The Design and Evaluation of RISC-V AIA Interrupt Controller

RISC-V高级中断架构AIA是最近推出的一种高性能中断规范。本文调研了该规范的功能目标,设计实现了一个同时支持有线中断和MSI中断的RISC-V AIA中断控制器,并给出了RISC-V AIA中断处理流程,然后分析和评估了RISC-V AIA规范在硬件资源开销、中断处理性能、软件使用等几个重要方面的优势。分析结果表明,AIA软硬件设计能够灵活、高性能地支持有线中断设备的中断、PCIe设备的MSI中断以及处理器核间的异步通信中断。本文对多核众核处理器的中断控制器设计和实现具有很高的参考价值。

RISC-V advanced interrupt architecture AIA is a recently launched high-performance interrupt specification.The research is aimed to investigate the functional goals of RISC-V Advanced Interrupt Architecture.A RISC-V AIA interrupt controller supporting both wired interrupts and MSI interrupts is designed and implemented.The RISC-V AIA interrupt handling flow is then presented.Finally,the advantages of the RISC-V AIA specification in hardware resource overhead,interrupt processing performance,and software usage are analyzed and evaluated.Experimental results show that AIA hardware and software design provides flexibility and high-performance to work directly with message-signaled interrupts(MSIs)as employed by PCI Express and other device standards,in addition to basic wired interrupts and asynchronous communication interrupts between processor cores.The research has reference value for the design and implementation of interrupt controllers for multi-core many-core processors.