基于FPGA的“低慢小”目标检测系统实现

Implementation of"Low Slow Small"Object Detection System Based on FPGA

为解决“低慢小”目标检测困难的问题,实现了一种基于FPGA(Field Programmable Gate Array,现场可编程逻辑门阵列)的“低慢小”目标检测系统。该系统采取COMS相机获取图像,DDR3 SDRAM缓存视频帧,使用FPGA处理帧间差分法和光流法结合的算法,目标检测结果使用VGA标准显示。测试结果表明,该系统能够检测出在悬停和低速飞行姿态下的低慢小无人机目标并实时显示。

To address the challenges associated with the detection of low,slow,and small(LSS)targets,a low,slow,and small target detection system based on Field Programmable Gate Array(FPGA)has been developed.This system employed a COMS camera for image acquisition,DDR3 SDRAM for video frame buffering,and utilized FPGA to process algorithms combining interframe differencing and optical flow.The results of target detection were presented using the VGA standard.Test outcomes verified the system's capability to detect and real-time display low,slow,and small unmanned aerial vehicle(UAV)targets in hovering and low-speed flight postures.