一种带曲率补偿的低功耗带隙基准设计

Design of a Low Power Bandgap Reference with Curvature Compensation

为了改善传统带隙基准中运放输入失调影响电压精度和无运放带隙基准电源抑制差的问题,设计了一款基于0.35μm BCD工艺的自偏置无运放带隙基准电路。提出的带隙基准源区别于传统运放箝位,通过负反馈网络输出稳定的基准电压,使其不再受运算放大器输入失调电压的影响;在负反馈环路与共源共栅电流镜的共同作用下,增强了输出基准的抗干扰能力,使得电源抑制能力得到了保证;同时采用指数曲率补偿技术,使得所设计的带隙基准源在宽电压范围内有良好的温度特性;且采用自偏置的方式,降低了静态电流。仿真结果表明,在5 V电源电压下,输出带隙基准电压为1.271 V,在-40~150℃工作温度范围内,温度系数为5.46×10^(-6)/℃,电源抑制比为-87 dB@DC,静态电流仅为2.3μA。该设计尤其适用于低功耗电源管理芯片。

A self-biased op-amp-free bandgap voltage reference circuit was designed in a 0.35μm BCD technology to address the issues of input offset affecting voltage accuracy and poor power supply rejection in traditional references.It stabilized the output reference voltage through a negative feedback network,effectively eliminating the influence of the operational amplifier's input offset voltage.By combining negative feedback and common-source/common-gate current mirrors,it enhances the reference's immunity to interference,ensuring improved power supply rejection.The circuit utilized exponential curvature compensation for excellent temperature characteristics over a wide voltage range.Additionally,the self-biasing scheme minimized static current consumption.Simulation results demonstrate a 1.271 V output reference voltage at a 5 V supply,with a temperature coefficient of 5.46×10^(-6)/℃from-40 to 150℃,a-87 dB power supply rejection at DC,and a static current consumption of 2.3μA.It is suitable for low power PM chips.