摘要
阐述可测试性设计(DFT)的特点。分析一种ASIC设计中DFT的方法,包括定义扫描链、定义测试信号、提取扫描链、写入测试协议,使设计人员可以优化最终芯片制造的功耗、面积和时序。
This paper expounds the characteristics of Design for Testability(DFT).It analyzes a method of DFT in ASIC design,including defining scan chains,defining test signals,extracting scan chains,and writing test protocols,allowing designers to optimize the power consumption,area,and timing of final chip manufacturing.
作者
叶琳娜
高大伟
熊瑛
易丹
YE Linna;GAO Dawei;XIONG Ying;YI Dan(Chengdu College,University of Electronic Science and Technology of China,Sichuan 611731,China)
出处
《集成电路应用》
2024年第3期4-5,共2页
Application of IC