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一种相邻游程增量编码的测试数据压缩方案

A Test Data Compression Scheme for Adjacent Run-Length Incremental Coding
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摘要 随着集成电路制造工艺的高速发展,其构造越来越复杂,测试成本也越来越高,而压缩测试数据是降低测试成本的有效方法之一。本文在双游程交替编码基础上,提出了一种相邻游程增量编码的测试数据压缩方案。先通过编码表获得当前游程编码长度N,然后得到当前游程减去前一游程的差值M,当M不为负数且比N-1小时,使用M+1个0表示当前游程。在压缩过程中,通过实时对比两种编码的长度,并选择长度小的编码以进一步压缩数据,实验证明本方案有着良好的压缩效果。 With the rapid development of integrated circuit manufacturing process,the structure of integrated circuit is becoming more complex,and the test cost is increasingly high.Compressing test data is one of the effective methods to reduce the test cost.This paper proposes a test data compression scheme for adjacent run-length incremental coding based on dual runlength alternate coding.First,the encoding length N of the current run-length is obtained from the encoding table.Then,get the difference M of the current run minus the previous run.When M is not negative and smaller than N-1,M+1 zeros are used to represent the current run.In the process of compression,the length of the two codes is compared in real time,and the code with small length is selected,so that the data can be further compressed.The experimental results also prove that the scheme has a good compression effect.
作者 吴海峰 邓博文 WU Haifeng;DENG Bowen(School of Computer and Information,Anqing Normal University,Anqing 246133,China)
出处 《安庆师范大学学报(自然科学版)》 2024年第1期72-77,共6页 Journal of Anqing Normal University(Natural Science Edition)
基金 安徽省高校自然科学研究重点项目(KJ2017A351)。
关键词 集成电路测试 测试数据压缩 相邻游程 相对长度 IC test test data compression adjacent run relative length
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