基于FPGA的相关干涉仪测向算法的设计与实现

Design and Implementation on Correlation Interferometer DirectionFinding Algorithm Based on FPGA

为了适应日渐复杂的电磁对抗环境,有别于传统的处理器采用串行架构使用IQ数据进行测向算法运算,为了能更快速、更稳定的计算出相位差,提出一种优化后的相关干涉仪测向算法架构并在FPGA上实现设计。详细给出FPGA测向系统架构和运算流程,并结合实际采取一个稳定的、经济实惠的系统架构;为了满足后续实际应用需求,在Xilinx的xc7vx690tffg1927-2为逻辑控制单元的载板进行板级测试中,验证了FPGA进行相关干涉仪测向识别结果的稳定性和高效性,经过验证发现,相较于传统的FPGA相关干涉仪测向架构,经实验测试后实现了所提出的架构在LUT资源占用率上降低了39.5%,测向速度提高17%,可处理信号带宽80 MHz,跳速高达1200跳/s。

In order to adapt to increasingly complex electromagnetic countermeasures environment,and differ from traditional processors by using serial architecture and IQ data for direction finding algorithm,an optimized correlation interferometer direction finding algorithm architecture is proposed and designed on FPGA to quickly and stably calculate the phase difference.This paper gives the architecture and operation flow of FPGA direction finding system in detail,and adopts a stable and economical system architecture in practice.In order to meet the requirements of subsequent practical applications,the board level testing is completed on the Xilinx's xc7vx690tffg1927-2 carrier board with the logic control unit,the FPGA correlation interferometer direction finding recognition results verify the stability and efficiency.The verification results show that compared with the traditional FPGA correlation interferometer direction finding architecture,the LUT resource occupancy of the proposed architecture is reduced by 39.5%,the direction finding speed is increased by 17%,with a process signal bandwidth of 80 MHz and jump speed of up to 1200 hops/s.