应用于收发链路多模块级联的优化设计方法

An optimization design scheme applied to multi-modules cascading of transceiver IC

为解决波束赋形芯片中子电路模块由于寄生效应而导致的级联失配问题提出了一种优化设计方法。该设计方法通过主动引入相邻器件阻抗牵引效应,并使其与级联阻抗失配相抵消从而实现阻抗“预失配”的设计方案。对“预失配”的技术原理以及设计流程进行了简要分析,并通过加工一款采用优化设计方案的4通道X/Ku波段的射频收发芯片,验证了该设计方案的可实现性与有效性。在8 GHz~18 GHz频带范围内,该芯片与基于端口驻波设计体系的原芯片相比,收发链路增益分别为6.5 dB和14 dB,提升了超过2 dB。发射链路输出功率21 dBm,发射效率为15.7%,分别提升了1 dB和9%。接收链路噪声系数为8.72 dB,降低了1.2 dB。收发链路最大移相均方根误差为5.12°和5.25°,分别下降了3.17°和1.75°。

In this paper,a novel optimization design scheme is proposed to solve the cascading mismatch problem of sub-circuits in beamforming chips due to parasitic effects.The optimization design scheme proposed in this paper is a design scheme that realizes impedance“pre-mismatch”by introducing the impedance traction effect of adjacent modules and offsetting it with the cascade impedance mismatch.The theory of the“pre-mismatch”technique is provided in the article and a 4-channel X/Ku-band RF transceiver chip has been fabricated to verify the feasibility and effectiveness of this scheme.Compared to conventional designs,the chip operates within the frequency band of 8 GHz~18 GHz,with the receive and transmit average link gains of 6.5 dB and 14 dB,respectively.Both transceiver link gains are increased by more than 2 dB.The transmit link output power is 21 dBm and power-added efficiency is 15.7%,optimized by 1 dB and 9%.The receive link noise figure of 8.72 dB is reduced by 1.2 dB.The maximum phase-shifted root-means-square errors of the transceiver link are 5.25°and 5.12°,with a decrease of 1.75°and 3.17°.