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高精度音频Sigma-Delta调制器综述

A Review of High-Resolution Audio Sigma-Delta Modulator
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摘要 Sigma-Delta(Σ-Δ)模数转换器(ADC)基于过采样和噪声整形技术,可实现高分辨率,具有无源器件匹配性要求低、结构简单等特点。在高精度音频领域,Σ-ΔADC能够实现高动态范围和良好的功率效率得到了广泛的关注和应用。近年来,依托先进工艺、先进技术进行低功耗高精度的音频ADC的设计已经成为新的研究热点。然而随着工艺技术向低节点的持续发展、电源电压的不断降低,使得Σ-ΔADC的电路设计更具挑战性。该文对高精度音频Sigma-Delta调制器的离散型设计、连续型设计的研究现状进行综述,为高精度音频Sigma-Delta调制器设计提供理论支撑,并给出研究前景展望。 Sigma-Delta(Σ-Δ)Analog-to-Digital Converter(ADC)is based on oversampling and noise shaping techniques to achieve high-resolution,and is characterized by low passive component matching requirements and simple structure.In high-resolution audio applications,Σ-ΔADC has gained widespread attention and applications since it can achieve high dynamic range with good power efficiency.Recently,there has been a growing research trend in designing low-power,high-resolution audio ADCs using advanced processes and technologies.However,with process technology going to lower nodes and the reduction of supply voltages,the circuit design becomes more challenging.This paper reviews the state-of-the-art of the discrete-time and continuous-time design of high-resolution audio Sigma-Delta modulators,provides theoretical background for the design of high-resolution audio Sigma-Delta modulators,and gives research prospects.
作者 孙奥运 温培旭 邵淮先 王桉楠 鲁毅 章飚 曾永红 张章 SUN Aoyun;WEN Peixu;SHAO Huaixian;WANG Annan;LU Yi;ZHANG Biao;ZENG Yonghong;ZHANG Zhang(School of Microelectronics,Hefei University of Technology,Hefei 230601,China;Tianjin JinHang Computing Technology Research Institute,Tianjin 300308,China)
出处 《电子与信息学报》 EI CAS CSCD 北大核心 2024年第5期1874-1887,共14页 Journal of Electronics & Information Technology
基金 国家自然科学基金(U19A2053) 安徽省自然科学基金(2308085MF207) 模拟集成电路国家重点实验室开放课题(JCKY2022210C001)。
关键词 Sigma-Delta(Σ-Δ)调制器 高精度 音频 Sigma-Delta(Σ-Δ)Modulator High-Resolution Audio
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  • 1Fujimori I, Koyama K, and Trager D, et al.. A 5-V single-chip delta-sigma audio A/D converter with 111 dB dynamic range [J]. IEEE Journal of Solid-State Circuits, 1997, 32(3): 329-336.
  • 2Geerts Y, Marques M A, and Steyaert M S. A 3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applications [J]. IEEE Journal of Solid-State Circuits, 1999, 34(7): 927-936.
  • 3Dolecek G and Mitra S. On design of CIC decimation filter with improved response 2008.ISCCSP 2008.3rd International Symposium on Communications, Control and Signal Processing, Malta, March 12-14, 2008: 1072-1076.
  • 4Chong K and Gopalakrishanan P, et al.. Low power approach for decimation filter hardware realization [C]. Proceedings of World Academy of Science, Engineering and Technology, Singapore, August 29-31, 2008: 550-553.
  • 5Shiraishi M. A simultaneous coefficient calculation method for sinc^N FIR filters [J]. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 2003, 50(4): 523-529.
  • 6Quiquempoix V and Bellini G, et al.. Digital decimation filter [P] US, 6,788,233, 2004.
  • 7Hogenauero B. An economical class of digital filters for decimation and interpolation [J]. IEEE Transactions on Acoustics, Speech, and Signal Processing, 1981, 29(2):155-162.
  • 8Chu S and Burrus C. Multirate filter designs using comb filters [J]. IEEE Transactions on Circuit Systems, 1984, 32(11): 913-924.
  • 9Losada R and Lyons R. Reducing CIC filter complexity [J]. IEEE Signal Process Magazine, 2006, 23(4): 124-126.
  • 10Laddomada M. Generalized comb decimation filters for ∑△ A/D converters: analysis and design [J]. IEEE Transactions on Circuits Systems I, 2007, 54(5): 994-1005.

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