摘要
随着电子技术的高速发展,更高密度、更小型化、更高集成化以及更高性能的封装需求给半导体制造业提出了新的挑战。由于物理限制,芯片的功能密度已达到二维封装技术的极限,不能再通过减小线宽来满足高性能、低功耗和高信号传输速度的要求;同时,开发先进节点技术的时间和成本很难控制,该技术的成熟需要相当长的时间。摩尔定律已经变得不可持续。为了延续和超越摩尔定律,芯片立体堆叠式的三维硅通孔(TSV)技术已成为人们关注的焦点。综述了TSV结构及其制造工艺,并对业内典型的TSV应用技术进行了分析和总结。
With the rapid advancement of electronic technology,the semiconductor manufacturing industry is faced with new challenges in meeting the packaging demands for higher density,more miniaturization,higher integration,and higher performance.The functional density of chip has reached the limit of two-dimensional packaging technology due to physical constraints.Reducing line width alone cannot satisfy the requirements for high performance,low power consumption,and high signal transmission speed.Developing advanced node technology poses difficulties in terms of time and cost control as it takes a considerable amount of time for the technology to mature.Moore's Law has become unsustainable.To continue and surpass Moore's Law,chip stereo-stacked three-dimensional through silicon via(TSV)technology nowadays has become the focus of attention.TSV structures and fabrication processes are reviewed,and typical TSV application technologies in the industry are analyzed and summarized.
作者
马书英
付东之
刘轶
仲晓羽
赵艳娇
陈富军
段光雄
边智芸
MA Shuying;FU Dongzhi;LIU Yi;ZHONG Xiaoyu;ZHAO Yanjiao;CHEN Fujun;DUAN Guangxiong;BIAN Zhiyun(Huatian Technology(Kunshan)Electronics Co.,Ltd.,Suzhou 215300,China)
出处
《电子与封装》
2024年第6期81-94,共14页
Electronics & Packaging
关键词
硅通孔
三维互连
集成技术
先进封装
TSV
3D interconnection
integrated technology
advanced package