一种恒定增益自适应连续时间线性均衡电路

A constant gain adaptive continuous time linear equalizer

提出了一种基于22 nm CMOS工艺制作的高速(25 Gbps)恒定增益的自适应连续时间线性均衡电路。分析了传统连续时间线性均衡电路的优缺点,简要介绍了几种经典的自适应均衡电路架构及其局限性,阐明了实现新架构自适应均衡的必要性。采用具有相同低频增益,不同峰化增益的两路信号传输路径相结合,通过调节两路信号结合权重来实现均衡增益调节,同时保持了低频增益恒定,以维持信号通道的噪声容忍度。对均衡器输出信号进行全频段和低频段的信号幅度整流检测,并经过与预设阈值进行比较,比较结果反馈控制均衡增益以实现自适应效果。基于22 nm CMOS工艺进行了电路设计,1.8 V电源供电,静态电流5 mA。仿真结果显示,可对经过0~10 dB@12.5 GHz的不同输入插损的25 Gbps输入信号进行合适的自适应均衡补偿,改善输出信号完整性,提高眼图开口度,降低抖动。电路结构简单,功耗/面积开销小,适用于小输入信号、噪声/功耗/面积敏感的应用场景,如高速光纤通信前端收发机。

A high-speed(25 Gbps)constant gain adaptive continuous time linear equalizer(CTLE)based on 22 nm CMOS process is presented.Benefits and drawbacks of conventional CTLE architecture are analyzed,several classical adaptive equalization topologies and limitations are also introduced briefly,the necessary of new adaptive equalizer architecture is interpreted.Utilizes two signal paths which are with same DC gain and different peaking gain,combines them together with adjustable weight to adjust the equalizing gain and keep the DC gain constant,which is aimed to keep the noise tolerance of signal path stable.Detects the full band and low band signal amplitude of equalizer output with rectifier,compares them with preset difference threshold and feedbacks the result to the equalizer,result in adaptive equalizing gain adjustable.The circuit is implemented in 22 nm CMOS process with 1.8 V supply and 5 mA current consumption.The simulation results show that,a 25 Gbps input signal with insert loss of 0-10 dB@12.5 GHz can be well adaptive compensated with the equalizer,the output eye diagram opening and jitter is improved.The proposal adaptive equalizer is simple in structure and costs less in power and area,which is well suited for some small input signal and noise/power/area sensitive scenarios,like high speed optical communication front end transceivers.