基于CPU-FPGA混合步长实时仿真的资源优化方法

Resource Optimization Method Based on CPU-FPGA Hybrid Step Size Real-Time Simulation

随着大量的高频电力电子设备接入电网系统,基于CPU实时仿真器由于串行计算的原因难以实现更小步长的仿真计算,采用基于现场可编程门阵列(field programmable gate array,FPGA)与CPU混合步长仿真逐步成为研究热点。然而在含有大量分布式电源的电力系统中,FPGA的资源消耗成为了仿真规模的限制因素。针对这一问题,提出了一种适用于CPU-FPGA联合实时仿真的资源优化方案,搭建了电力系统暂态联合实时仿真平台。以双馈风电系统为例,将整个系统划分为CPU部分与FPGA部分,两部分之间以千兆以太网进行异步通信,在FPGA部分内使用优化后的仿真流程以此降低对硬件资源的占用率。最后,通过实时仿真结果与Simulink离线仿真和传统仿真模型进行比较,证明采取该方式能在保证仿真精度的前提下有效减少对FPGA资源的消耗。

With the integration of a large number of high-frequency power electronic devices into the power grid system,CPU based real-time simulators are difficult to achieve smaller step size simulation calculations due to serial computing reasons.Therefore,a field programmable gate array(FPGA)based simulation method is adopted,the mixed step simulation of FPGA and CPU has gradu⁃ally become a research hotspot.However,the resource consumption of FPGA has become a limiting factor for simulation scale in power systems with a large number of distributed power sources.A resource optimization scheme suitable for CPU-FPGA joint realtime simulation is proposed to address this issue,and a transient joint real-time simulation platform for power systems is built.Taking the double-fed wind power system as an example,the entire system is divided into CPU and FPGA parts,with asynchronous com⁃munication between the two parts using Gigabit Ethernet.The optimized simulation process is used within the FPGA part to reduce the usage of hardware resources.Finally,by comparing real-time simulation results with Simulink offline simulation and traditional simulation models,it is proven that adopting this approach can effectively reduce the consumption of FPGA resources while ensuring simulation accuracy.