碳化硅晶片的腐蚀坑尺寸稳定性研究

Study on the Stability of Corrosion Pit Size in Silicon Carbide Wafers

阐述以4H碳化硅为衬底制造的半导体器件,相较硅基器件有显著优越的特性,应用领域广泛。但碳化硅衬底表面位错的存在,使碳化硅基器件的性能和可靠性严重退化。准确的检测出位错缺陷对碳化硅工业化应用有很重要的意义。实验研究熔融KOH刻蚀碳化硅表面,形成位错腐蚀坑尺寸大小的影响因素,以获得位错缺陷相对稳定的腐蚀形貌,进而提高刻蚀后衬底自动位错检测的准确性和稳定性。

This paper describes that SiC-based device fabricated on 4H-SiC substrate have significantly superior properties compared with Si-based devices and are widely used in many fields.However,the existence of dislocations on the surface of SiC substrate seriously degenerate the performance and reliability of SiC-based devices.Accurate detection of dislocation defects is very important for the industrial application of silicon carbide.In this paper,we studied the impact factors for the dimension of the dislocation etch pit formed by molten KOH etching on the surface of silicon carbide wafers,so as to obtain the relatively stable corrosion morphology of the dislocation defects,and furthermore,to improve the accuracy and stability of automatic dislocation detection of the etched substrate.