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中国散裂中子源自研前端专用芯片CSNS_VASD性能测试

Performance test of front-end ASIC chip CSNS_VASD developed for China Spallation Neutron Source
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摘要 中子闪烁体探测器是中国散裂中子源工程主力探测器之一,高探测效率是目前正在研制的第二代中子闪烁体探测器的设计目标。CSNS_VASD芯片是中国散裂中子源工程专门为第二代中子闪烁体探测器研发的一款专用集成电路芯片。为了验证芯片性能,设计了专用测试系统,并在实验室和中子束线对芯片进行了测试。测试结果显示:自研芯片的非线性误差≤1%、等效噪声电压≤0.63 mV、通道间串扰≤0.89%;探测器探测效率为40.7%@0.1 nm。性能指标均达到了工程设计指标的要求。CSNS_VASD芯片的成功研制为中国散裂中子源工程的顺利建设提供了可靠的技术保障。 [Background]The neutron scintillator detector is one of the main detectors for China Spallation Neutron Source(CSNS).High detection efficiency is the design goal of the second-generation neutron scintillator detector,which is in process of development,composed of neutron scintillation screen,wavelength transfer optical fiber and photoelectric converter.CSNS_VASD chip is an application-specific integrated circuit(ASIC)developed for China Spallation Neutron Source as the second-generation neutron scintillator detector.[Purpose]This study aims to evaluate the performance of the front-end ASIC chip CSNS_VASD by experimental test.[Methods]The combined architecture of"ASIC test board plus digital readout board"was adopted for overall test system design.The ASIC test board was used to amplify,shape and distinguish signals whilst the digital readout board took the roles of configuring the ASIC and its auxiliary circuits,packing and caching the test data,and sending it to the back end for processing and analysis through optical fiber Ethernet.The relevant performance parameters of the chip were tested in the laboratory using exponential like wave test signal with amplitude of 10~120 MV,pulse width of 1μs and frequency of 100 K as the input signal of ASIC chip,and the neutron beamline of CSNS.[Results]The results show that the nonlinear error of CSNS_VASD is better than 1%,the equivalent voltage noise is better than 0.63 mV,the crosstalk value is better than 0.89%,and the detection efficiency of the detector is 40.7%@0.1 nm.[Conclusions]All of the test indexes meet the requirement of the design target.The successful development of the CSNS_VASD chip provides a reliable technical guarantee for the smooth construction of China Spallation Neutron Source.
作者 杨浩 路书祥 李怀申 陈少佳 唐彬 王修库 曾莉欣 于莉 万志永 刘慧银 孙志嘉 YANG Hao;LU Shuxiang;LI Huaishen;CHEN Shaojia;TANG Bin;WANG Xiuku;ZENG Lixin;YU Li;WAN Zhiyong;LIU Huiyin;SUN Zhijia(Zhengzhou University,Zhengzhou 450001,China;Institute of High Energy Physics,Chinese Academy of Sciences,Beijing 100049,China;Spallation Neutron Source Science Center,Dongguan 523803,China)
出处 《核技术》 EI CAS CSCD 北大核心 2024年第7期48-56,共9页 Nuclear Techniques
基金 广东省基础与应用基础研究基金项目(No.2020B1515120025) 国家自然科学基金面上项目(No.11875273)资助。
关键词 中国散裂中子源 中子闪烁体探测器 专用集成电路芯片 硅光电倍增管 FPGA China Spallation Neutron Source Neutron scintillator detector ASIC SiPM FPGA
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