一种5.0~9.3 GHz低功耗宽带低噪声放大器设计

Design of a 5-9.3 GHz Low-Power Broadband Low-Noise Amplifier

针对Wi-Fi 6、Wi-Fi 6E(5 GHz、6 GHz)的低功耗、宽带宽等无线局域网(WLAN)设备需求,基于65 nm CMOS工艺设计了一款两级低功耗宽带低噪声放大器(LNA)。电路第一级采用结合互补共源电路的共源共栅结构,通过电感峰化技术和负反馈技术的运用,提高输入跨导,降低噪声,并拓展带宽和提高增益平坦度。第二级在共漏极缓冲器基础上引入辅助放大结构、电感峰化技术,实现抵消第一级共源管的噪声并拓展带宽。电路采用提出的前向衬底自偏置技术,以降低电路对电源电压的依赖,整体电路实现两路电流复用,从而有效降低了功耗。仿真结果表明,在5~9.3 GHz频带内LNA的S_(21)为17.8±0.1 dB,S11小于-9 dB、S_(22)小于-11.9 dB,噪声系数小于1.34 dB。在0.8 V电压下整体电路功耗为5.3 mW。

A two-stage,low-power,wideband low noise amplifier(LNA)was designed using a 65 nm CMOS process to address the requirements of wireless local area network(WLAN)devices for Wi-Fi 6 and Wi-Fi 6E(5 GHz,6 GHz)applications.The first stage of the circuit adopts a cascode structure,combining the complementary common-source circuits.By incorporating inductor peaking and negative feedback techniques,the input transconductance is enhanced,the noise is reduced,and the bandwidth is expanded,resulting in improved gain flatness.The second stage introduces an auxiliary amplification structure and an inductor peaking technique based on a common-drain buffer,which cancels out the noise from the first-stage common-source transistor and further extends the bandwidth.Both stages employ the proposed self-forward body biasing technique to reduce the circuit’s dependency on the power supply voltage.The overall circuit implements dual-current reuse to effectively lower the power consumption.The simulation results demonstrate that the LNA achieves S_(21) of 17.8±0.1 dB within the frequency range of 5-9.3 GHz,with S11 less than-9 dB,S22 less than-11.9 dB,and NF below 1.34 dB.The overall circuit power consumption is 5.3 mW at a voltage of 0.8 V.