摘要
基于40 nm CMOS工艺,设计了一种具有高频高电源抑制(PSR)的无片外电容低压差线性稳压器(LDO)电路。电路采用1.1 V电源供电,LDO输出电压稳定在0.9 V。仿真结果表明,传统无片外电容LDO电路的PSR将会在环路的单位增益频率(UGF)处上升到一个尖峰,之后才经输出节点处的电容到地的通路开始降低,最高时PSR甚至大于0 dB。采用新型的衬底波纹注入技术的LDO能很好地抑制PSR的尖峰,可以做到全频段都在-20 dB以上,相比传统结构,尖峰处的PSR提高了20 dB以上。该LDO适用于需要低电压供电的射频电路。
A high-PSR capless-LDO circuit with body-ripple injection based on 40 nm CMOS IC process was designed.The circuit is powered by a 1.1 V power supply,and the LDO output voltage is stable at 0.9 V.Simulation results show that the PSR of conventional capless-LDO circuit increases to a peak at the UGF of the loop and then begin to decrease through the capacitor-to-ground path at the output node.The highest PSR is even greater than 0 dB.The LDO using the new substrate ripple injection technology can adequately suppress the PSR peak and achieve the entire frequency band above-20 dB.Compared with the conventional structure,the PSR at the peak increases by more than 20 dB.The LDO can be applied to RF circuits that require low voltage power supplies.
作者
唐太龙
刘凡
廖鹏飞
肖淋洋
TANG Tailong;LIU Fan;LIAO Pengfei;XIAO Linyang(CETC Chips Technology(Group)Co.,Ltd.,Chongqing 400060,P.R.China;National Key Laboratory of Integrated Circuits and Microsystems,Chongqing 400060,P.R.China)
出处
《微电子学》
CAS
北大核心
2024年第2期207-213,共7页
Microelectronics
基金
重庆市自然科学基金面上项目(CSTC2021JCYZ-MSXMX1197)。