适用于共晶焊的肖特基二极管背面金属化工艺优化

Optimization of chip back metallization process using Schottky diodes for eutectic soldering

[目的]为了降低成本,减少污染,提高工艺效率,对肖特基二极管背面金属化工艺进行研究,探索锡锑合金替代金系合金的最佳不持温镀膜金属化工艺.[方法]通过持温镀膜与不持温镀膜对比实验,分析电子束蒸发镀膜基片温度对阴极金属层间黏附性和导电性,以及薄膜厚度对空洞率的影响,得到适用于批量共晶焊的肖特基二极管背面金属化最优工艺参数.[结果]当基片温度为180℃时,不持温镀膜的剪切力为64.53 N,高于持温镀膜的剪切力;当金属化锡锑合金膜厚为3μm时,共晶焊的空洞率低于5%,符合共晶焊要求;电子束蒸发镀膜背面金属层方块电阻随基片温度升高先减小后增大,温度在180~240℃之间,方块电阻随基片温度的变化不大.[结论]用于共晶焊的肖特基二极管背面金属化的最优工艺为基底温度升到180℃后在自然降温的同时进行多层金属镀膜,锡锑合金镀膜厚度为3μm.

[Objective]As a pivotal process in semiconductor device fabrication,the metallization with its conditions and parameters directly impacts the performance of these devices.To reduce fabrication costs,diminish environmental pollution,and improve the efficiency of backside metallization for Schottky diodes,we have undertaken a comprehensive study.Exploring an optimal non-thermal plating metallization technique,we advocate the use of tin-antimony alloy as a viable alternative to conventional gold-based alloys.Finally,this approach aims to enhance the sustainability without compromising on quality or performance.[Methods]Through comparative experiments between temperature-controlled and non-temperature-controlled plating,we analyze the effect of substrate temperatures during the electron beam evaporation on the adhesion between cathode metal layers,as well as the impact of tin-antimony alloy layer thickness on the void rate of subsequent eutectic soldering.Consequently,the main contribution of our study lies in the determination of optimal-process parameters for backside metallization of Schottky diodes suitable for mass eutectic soldering.[Results]The influence of substrate temperatures on the shear force is pronounced,with both coating techniques exhibiting lower shear forces at reduced substrate temperatures.The shear force increases as the substrate temperature rises,peaking at 64.53 N for non-isothermal coating and 64.41 N for isothermal coating at 180℃.Beyond this temperature,the shear force paradoxically diminishes with further temperature increases.In metallization processes,thicker tin-antimony alloy films correspond to lower soldering void rates.A film thickness of 3μm results in a void rate of less than 5%during chip eutectic soldering,satisfying the criteria for eutectic bonding.The sheet resistance of the metal layer on the reverse side,produced by electron beam evaporation,initially decreases and subsequently increases along with rising substrate temperature.Between 180℃and 240℃,the sheet resistance varies gradually with the substrate temperature,and attains a minimum of 11.8Ω/sq at 210℃.However,the sheet resistance escalates rapidly when the substrate temperature surpasses 240℃.[Conclusions]The optimal process for the back metallization of Schottky diodes used in eutectic soldering is involved with increasing the substrate temperature to 180℃,followed by multi-layer metal coating during natural cooling,with a tin-antimony alloy film thickness of 3μm.The non-isothermal coating process,in which the tin-antimony alloy is used as a substitute for gold-based alloys,not only reduces manufacturing costs but also minimizes the environmental pollution.This outcome secures significant implications for the mass production of Schottky diodes.