一种具有反压保护功能的高性能LDO设计

Design of a High-performance LDO with Reverse-voltage Protection

针对LDO在反向电压状态下存在反灌电流现象并会对芯片造成损坏的问题,传统方案一般采用二极管进行反向保护,但这种方法会显著增大LDO的最小压差。文章采用MOS管替换二极管的方式来构成反向电压保护结构,并优化误差放大器和功率管尺寸,设计出的LDO最小压差在500 mA满负载下达到251 mV。然而加入防反向MOS管会使功率管的栅极驱动电容负载增大,给环路的稳定度带来难题。针对该问题,文章使用零极点抵消技术,通过引入零点的方式解决了LDO环路稳定困难的问题。电路基于TSMC 0.18μm BCD工艺设计,测试结果与仿真结果相符。结果表明,在2.5~20 V的输入电压范围内,负载电流为0~500 mA时,电路的输出电压为1.2 V,精度在±1%以内;负载调整率和线性调整率分别为0.85μV/mA和11.65μV/V;PSRR为93.4 dB@100 Hz。

A large reverse current can damage an LDO when the input voltage of the LDO is reversed.The conventional structure uses diodes for reverse protection,which significantly increases the dropout voltage of the LDO.In this study,the diode is replaced with an MOS transistor for reverse voltage protection.Through optimizing the error amplifier and adjusting the size of the power transistor,the dropout voltage of the LDO is as low as 251 mV(500 mA at full load).However,the introduced anti-reverse MOS transistor increases the capacitance load of the gate driver of the power transistor,which affects the stability of the loop.A zero-pole cancellation technique is proposed to solve the problem of LDO loop stability.This design is implemented using a TSMC 0.18 μm BCD process.The measured results show that the output voltage of the circuit is 1.2 V with an accuracy within ±1% when the input voltage is 2.5-20 V and the load current is 0-500 mA.The load and line regulations are 0.85 μV/mA and 11.65 μV/V,respectively.The PSRR is 93.4 dB@100 Hz.