An ultra-deep TSV technique enabled by the dual catalysis-based electroless plating of combined barrier and seed layers

Silicon interposers embedded with ultra-deep through-silicon vias(TSVs)are in great demand for the heterogeneous integration and packaging of opto-electronic chiplets and microelectromechanical systems(MEMS)devices.Considering the cost-effective and reliable manufacturing of ultra-deep TSVs,the formation of continuous barrier and seed layers remains a crucial challenge to solve.Herein,we present a novel dual catalysis-based electroless plating(ELP)technique by tailoring polyimide(PI)liner surfaces to fabricate dense combined Ni barrier/seed layers in ultradeep TSVs.In additional to the conventional acid catalysis procedure,a prior catalytic step in an alkaline environment is proposed to hydrolyze the PI surface into a polyamide acid(PAA)interfacial layer,resulting in additional catalysts and the formation of a dense Ni layer that can function as both a barrier layer and a seed layer,particularly at the bottom of the deep TSV.TSVs with depths larger than 500μm and no voids are successfully fabricated in this study.The fabrication process involves low costs and temperatures.For a fabricated 530-μm-deep TSV with a diameter of 70μm,the measured depletion capacitance and leakage current are approximately 1.3 pF and 1.7 pA at 20 V,respectively,indicating good electrical properties.The proposed fabrication strategy can provide a cost-effective and feasible solution to the challenge of manufacturing ultra-deep TSVs for modern 3D heterogeneous integration and packaging applications.