基于晶圆级封装PDK的微带发夹型滤波器设计

Design of Microstrip Hairpin Filter Based on Wafer Level Packaging PDK

基于中国电子科技集团公司第五十八研究所的晶圆级封装工艺及其工艺设计套件(PDK),完成了多款通带范围在20~68 GHz的5阶微带发夹型滤波器的设计和优化。首先,根据平行耦合滤波器的基础理论,计算发夹型滤波器的特征尺寸;其次,调用PDK中的衬底和元件模型实现滤波器的快速建模和参数优化;最后,采用多层再布线工艺对设计出的发夹型滤波器进行加工。实测结果和仿真结果具有较高的一致性,验证了该款晶圆级封装PDK的应用价值,能够为无源滤波器集成设计提供新的工具选择。

Based on the wafer level packaging process and process design kit(PDK)of the China Electronics Technology Group Corporation No.58 Research Institute,the design and optimization of several 5-order microstrip hairpin filters with the passband range of 20~68 GHz are completed.Firstly,based on the basic theory of parallel coupling filter,the characteristic sizes of the hairpin filters are calculated.Secondly,the substrate and component models in PDK are invoked to realize the fast modeling and parameter optimization of the filters.Finally,the designed hairpin filters are processed using multi-layer rewiring technology.The high consistency between the measured results and the simulation results verifies the application value of the wafer level packaging PDK,which can provide a new tool choice for passive filter integration design.