紧凑型D波段宽带CMOS低噪声放大器

Compact D-band wideband CMOS low noise amplifier

基于28-nm CMOS工艺,设计了一款工作于D波段的紧凑型、宽带低噪声放大器。该放大器由四级放大器单元级联而成,每级放大器单元均采用基于中和电容技术的差分共源极结构。输入、输出和级间阻抗匹配电路均由变压器网络实现,并且每个放大器单元的中心工作频率被交错配置在120GHz和155GHz附近以实现参差调谐带宽拓展,从而在宽带内实现了平坦的增益响应。仿真和测试结果表明,在34mW直流功耗下,该放大器在中心频率140GHz处实现了19.5dB的峰值增益和28GHz(128GHz~156GHz)的3dB工作带宽,噪声系数和输入1dB压缩点分别为7.8dB~9.2dB和-19.8dBm~-16.6dBm。芯片的核心面积仅为200μm×550μm。

A compact D-band wideband low-noise amplifier is designed using 28-nm CMOS process.The amplifier consists of four amplifier unit,each amplifier unit employs a differential common-source structure based on the capacitive neutralization technique.The input,output,and interstage impedance matching circuits are realized by a transformer network,and the center operating frequency of each amplifier unit is centrally configured around 120GHz and 155GHz to implement a staggered tuning bandwidth expansion technique,which enables the amplifier to achieve a flat gain response over a wide bandwidth.Under 34mW DC power consumption,simulated and measured results show that the amplifier achieves a 19.5dB peak gain at the center frequency of 140GHz and a 28GHz(128GHz~156GHz)3dB bandwidth,with a noise figure and input 1dB compression point of 7.8dB~9.2dB and-19.8dBm~-16.6dBm,respectively.The core area of the chip is only 200μm×550μm.