摘要
为了实现较高的电容检测范围,传统的采用SAR ADC的开关电容(Switched capacitor,SC)的电容数字转换器(Capacitance to digital converter,CDC)使用高压供电提高输出摆幅,而其为了保证噪声性能又采用大电流驱动,所以显著增加了系统功耗。为了解决以上问题,提出了一种基于数字放大器的电容数字转换器,将CDAC阵列作为模拟输出承担高压。仅对CDAC阵列与传感电容采用高压(5 V)驱动,而其余部分仍采用低压(1 V)供电,使得CDC在达到高动态范围与高灵敏度的同时保持低功耗、低噪声。此外,针对噪声的优化,本文一方面通过在数字放大器内加入积分环路实现SAR ADC的一阶噪声整形,降低了系统的量化噪声,提高了CDC的有效位数;另一方面通过引入有源噪声抵消(Active noise cancellation technology,ANC)技术,降低了系统的混叠噪声,提高了系统的信噪比。
The traditional switched-capacitor(SC)capacitance-to-digital converter(CDC)based on SAR ADC uses high-voltage power supply to increase output swing in order to achieve a high capacitance detection range.However,to maintain noise performance,they require high current drive,significantly increasing system power consumption.To address the above issues,this article proposes a capacitance-to-digital converter based on a digital amplifier,which uses the CDAC array as the analog output to bear high voltage.Only the CDAC array and sensing capacitors are driven by high voltage(5 V),while the rest is still powered by low voltage(1 V),allowing the CDC to achieve high dynamic range and sensitivity while maintaining low power consumption and low noise.In addition,for the optimization of noise,this work achieves first-order noise shaping for SAR ADC by adding an integral loop in the digital amplifier,reducing the quantization noise of the system and improving the effective number of bits for CDC.On the other hand,by introducing active noise cancellation(ANC)technology,the system's aliasing noise is reduced and the signal-to-noise ratio is improved.
作者
佟思源
钟龙杰
曹文飞
王凌
朱樟明
TONG Siyuan;ZHONG Longjie;CAO Wenfei;WANG Ling;ZHU Zhangming(Key Laboratory of Analog Integrated Circuits and Systems,Ministry of Education,School of Microelectronics,Xidian University,Xi’an 710071,China)
出处
《集成电路与嵌入式系统》
2024年第9期42-48,共7页
Integrated Circuits and Embedded Systems
基金
国家自然科学基金项目(92164301,62021004)。