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用于高速高精度模数转换器的16Gb/s串行接口发射机电路

A 16 Gb/s SerDes Transmitter for High-Speed and High-Precision Analog-to-Digital Convertors
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摘要 针对高速高精度模数转换器(ADC)中的高速串行接口(SerDes)发射机电路面临的信道损耗、噪声、串扰、工艺波动等非理想因素,提出了一种符合传输接口JESD204B协议要求的高速串行发射机电路结构,综合使用匹配阻抗校准、前馈均衡(FFE)和T-coil等技术来改善数据传输质量。对于现有半速率发射机结构对时钟占空比较为敏感的问题,设计了时钟占空比校准电路来稳定输出时钟的占空比。另外,文中所采用的多支路并联的源串联终端(SST)驱动器架构,有效地实现了匹配阻抗校准与前馈均衡方案的结合,大幅减小了电路复杂度和面积占用,显著降低了发射机功耗。提出的发射机电路采用28 nm CMOS工艺设计并流片,实测结果表明,在16 Gb/s的传输速率下,输出信号眼高为811 mV、眼宽约为58.8 ps,总抖动为7.35 ps,发射机功耗约为49.2 mW,能效比为3.07 pJ/bit,电路版图面积约为300×150μm^(2)。在满足协议要求的前提下,该发射机在抖动性能、能效和电路面积上具有显著优势。 A high-speed serial transmitter circuit compliant with the JESD204B protocol is designed in this paper,aiming to address the non-ideal factors such as channel attenuation,noise,and crosstalk faced by the transmitter circuit of high-speed Serial/De-serial interface(SerDes)in high-speed and high-precision analog-to-digital converters(ADCs).The design employs several techniques such as matching impedance calibration,feed-forward equalization,and T-coil to improve the quality of data transmission.In addition,to tackle the sensitivity of the current half-rate transmitter architecture to variation in the input clock duty cycle,a duty cycle calibration circuit is devised to stabilize the duty cycle of the output clock.Besides,the source-series-terminated(SST)driver architecture with multiple parallel slices is adopted to realize the combination of matching impedance calibration and feed-forward equalization scheme,significantly reducing circuit complexity,area occupation,and power consumption of the transmitter.The transmitter is designed and fabricated in a 28 nm CMOS process.Measurement results show that,at a transmission rate of 16 Gb/s,the transmitter achieves an eye height of 811 mV,an eye width of 58.8 ps,a total jitter of 7.35 ps,a power consumption of 49.2 mW,and an energy efficiency rate of 3.07 pJ/bit.The layout area measures 300×150μm^(2).The transmitter showcases significant advantages in terms of jitter performance,energy efficiency,and circuit area while meeting protocol requirements.
作者 韩佳利 任佳佳 裴磊 李楠楠 齐欢欢 王金富 张杰 张鸿 HAN Jiali;REN Jiajia;PEI Lei;LI Nannan;QI Huanhuan;WANG Jinfu;ZHANG Jie;ZHANG Hong(School of Microelectronics,Xi’an Jiaotong University,Xi’an 710049,China;Xi’an Aerosemi Technology Company,Xi’an 710076,China)
出处 《西安交通大学学报》 EI CAS CSCD 北大核心 2024年第9期173-182,共10页 Journal of Xi'an Jiaotong University
基金 国家自然科学基金资助项目(62174149) 国家重点研发计划资助项目(2022YFC2404902)。
关键词 发射机 阻抗校准 占空比校准 T-coil 源串联终端 transmitter impedance calibration duty cycle calibration T-coil source-series-terminated
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