三维量子芯片硅通孔热应力对阻止区的影响

Influence of Through-Silicon-Via Thermal Stress on Keep-out-Zone in 3D Quantum Chips

基于材料的温度相关特性,研究了0.02~300 K极限温度范围内三维超导量子芯片中热导硅通孔(TTSV)热应力对有源层阻止区(KOZ)的影响。利用有限元模拟方法,基于单个TTSV的KOZ特性,发现阵列TTSV间的相对角度(θ_(R))和间距(L)的变化会改变热应力相互作用的方式和程度。增大θ_(R)可减小Si衬底的电子迁移率变化以及KOZ的连通度和面积。θ_(R)为0°时,TTSV排布整齐,MOSFET易于布置,增大L可减小电子迁移率变化以及KOZ的连通度和面积;θ_(R)为45°时,可用于布置MOSFET的区域较零散,但减小L可减小电子迁移率变化和KOZ面积,且L对特征点处电子迁移率和KOZ连通度影响很小。研究结果可为三维超导量子芯片中TTSV和读出/控制电路的优化布置提供指导。

Based on the temperature-related characteristics of materials,the influence of thermal stress induced by thermal through-silicon-via(TTSV)on the keep-out zone(KOZ)of the active layer in the 3D superconducting quantum chip within the temperature range of 0.02 K to 300 K was investigated.With the finite element simulation method,based on the KOZ characteristics of the single TTSV,it is found that the mode and degree of thermal stress interaction may change with the change of the relative angle(θ_(R))and pitch(L)between array TTSVs.Increasingθ_(R) can reduce the electron mobility variation and the connectivity and the area of KOZs.Whenθ_R is 0°,neatly arranging TTSVs facilitates easy placement of MOSFETs,and increasing L can reduce the electron mobility variation and the connectivity and the area of KOZs.Whenθ_(R) is 45°,the regions available for arranging MOSFET is scattered,but decreasing L can reduce the electron mobility variation and the area of KOZs,and the L possesses minimal effect on electron mobility at the characteristic point and KOZ connectivity.The research results can provide guidance for the optimal layout of TTSVs and readout/control circuits in 3D superconducting quantum chips.