多位平面循环的优化截取内嵌码块编码VLSI结构

VLSI architecture for multi bit plane cyclic embedded block coding with optimized truncation encoding

目的EBCOT(embedded block coding with optimized truncation)优化截取内嵌码块编码的结果对JPEG2000的压缩质量产生直接影响,且EBCOT编码在整个JPEG2000压缩过程中占据较长时间。此外,由于该算法的复杂性较高,在硬件实现时需要考虑其对硬件资源的使用率。对此,提出了一种高效的EBCOT编码VLSI(very large scale integration circuit)结构。方法首先,EBCOT编码分为两部分:Tier1编码与Tier2编码。针对影响编码速度的Tier1编码部分,设计了一种全新的编码窗口结构,即多位平面循环编码(multi-bitplanes cyclic encoding,MBCE),其通过预测的方式对连续的位平面进行编码;针对Tier2编码部分中的通道失真误差计算,设计了与Tier1编码并行的流水线计算结构。结果采用Verilog语言对该VLSI结构进行描述,将FPGA(field programmable gate array)作为实验验证平台,从多个角度与现有的EBCOT优化VLSI结构进行比较。从编码效率上来看,MBCE结构在实现全通道并行的基础上,编码效率有明显的提升、所占用的硬件资源较少、工作频率较高。在同一压缩条件下,使用MBCE结构与以JPEG2000为标准的图像压缩软件对同一幅512×512像素的8位灰度图像进行压缩对比,峰值信噪比(peak signal-to-noise ratio,PSNR)的误差不超过0.05 dB,在xc4vlx25型号FPGA上其工作频率可以达到193.1 MHz,每秒能够处理370帧图像。结论本文提出的全通道MBCE的EBCOT编码VLSI结构,具有资源占用率低、编码周期短、压缩质量好的特点。

Objective JPEG2000 is composed of multiple image encoding algorithms,with embedded block coding with optimized truncation(EBCOT)serving as the core encoding algorithm.EBCOT is a key algorithm in JPEG2000 image compression standard,and its coding results directly affect the compression quality of images.EBCOT encoding is internally composed of Tier1 encoding and Tier2 encoding.Tier1 encoding is responsible for encoding the quantized wavelet coefficients.This process is the core of EBCOT encoding to achieve compression effect;thus,it requires substantial resources in hardware implementation to ensure the efficiency and accuracy of data output.Tier2 encoding is responsible for truncating and packaging the encoding results of Tier1,and its encoding results affect the compression rate and compression effect of JPEG2000.Tier2 encoding takes less time,and the rate distortion calculation can be completed simultaneously with Tier1 encoding,shortening the compression time.At the same time,given the inherent intricacies of the algorithm,a diligent consideration of hardware resource utilization is imperative during its implementation in hardware.This cautious approach ensures the judicious employment of limited hardware resources toward the realization of an efficient EBCOT encoding tailored for JPEG2000 image compression.Therefore,to solve these problems,a parallel EBCOT coding very large scale integration circuit(VLSI)architecture with all pass multi bit plane cyclic coding is proposed.Method The EBCOT encoding process has two main parts:Tier1 encoding and Tier2 encoding.A novel encoding window structure,i.e.,multi bit plane cyclic encoding(MBCE),is designed to address the encoding speed in the Tier1 encoding part.The encoding window consists of four encoding columns:completed encoding column,current encoding column,prediction column,and updated prediction column.The 5×4 encoding window in question exploits the encoding information of each bit plane layer to parallelize the encoding process,effectively breaking the interplane correlation and remarkably improving the encoding efficiency.Additionally,compared with traditional parallel encoding structures,this encoding window utilizes few encoding resources by reusing encoders.Furthermore,it supports encoding arbitrary-sized code blocks.With regard to the pass distortion calculation in the Tier2 encoding part,a pipeline calculation structure is designed to run in parallel with Tier1 encoding.By fetching the bit plane coding results in Tier1 encoding,the complex multiplication and addition operations are split into multiple stages of pipeline,enabling the structure to work at a higher frequency on FPGA and improving the overall encoding efficiency.Moreover,this structure can run in parallel with Tier1 encoding without compromising the throughput of Tier1 encoding.By designing an efficient Tier1 encoding structure and a multistage parallel encoding structure for Tier2,the parallel structure between them reduces the time required for EBCOT encoding and improves the overall encoding efficiency while ensuring the image compression quality.By optimizing the Tier1 and Tier2 encoding processes and utilizing parallel processing techniques,the proposed MBCE architecture aims to improve the efficiency of EBCOT encoding,reduce the encoding time,and enhance the overall image compression quality.Result The MBCE encoding structure proposed in Verilog is described at RTL level,and FPGA is selected as the experimental verification platform for this structure.The structural encoding rate,encoding compression effect,and the required resources of the encoding structure are compared with the existing EBCOT optimized structure.In terms of encoding efficiency,the proposed structure shows remarkable improvement compared with the bit plane parallel encoding structure.Moreover,the proposed MBCE structure considerably reduces the required encoding cycles in image compression compared with several existing EBCOT encoding VLSI structures.By implementing whole pass parallelism,the encoding efficiency is enhanced.Additionally,the hardware resource utilization and maximum operating frequency of the proposed structure are superior to several EBCOT structures mentioned in the literature.In the 1:8 lossless compression mode of the three-level 5/3 wavelet transform with a block size of 32×32,the MBCE structure is used to compress the same 512×512 pixels 8-bit standard grayscale image.Compared with the JPEG2000 standard image compression software Jasper,Openjpeg,and Kakadu,the peak signal-tonoise ratio error is less than 0.05 dB.On the xc4vlx25 model FPGA,its operating frequency can reach 193.1 MHz,and it can process 370 frames per second.Conclusion The proposed MBCE structure in this study not only exhibits low resource utilization and high encoding throughput but also ensures short encoding cycles.The JPEG2000 compression system using the EBCOT structure proposed in this study has been tested and found to achieve a maximum image quality deviation compared with images encoded using standard JPEG2000 compression software.This remarkable deviation demonstrates the effectiveness of the proposed MBCE structure in preserving image quality during the compression process.The compressed images maintain a high level of fidelity comparable with those produced by established JPEG2000 compression software.This improvement in image quality is attributed to the optimized Tier1 and Tier2 encoding processes and the utilization of parallel processing techniques in the MBCE architecture.The resulting enhancement in image compression quality highlights the potential of the proposed MBCE structure for improving JPEG2000-based image compression.