基于HTCC和薄膜工艺的微系统封装基板制备技术

Preparation Technology of Microsystem Packaging Substrate Based on HTCC and Thin Film Process

随着对微系统轻量化、小型化、高密度和高可靠性的要求越来越高,高集成度的微系统封装基板成为业界关注的焦点。采用多层薄膜工艺与多层高温共烧陶瓷(HTCC)工艺结合的方式制备了微系统封装陶瓷基板。薄膜工艺的布线宽度仅为0.02 mm,线间距仅为0.02 mm,小于多层HTCC基板的0.05 mm线宽和0.085 mm线间距。对多层HTCC与多层薄膜结合制备的基板的可靠性进行了验证,结果符合GJB 548C—2021标准对焊接和键合的指标要求。对关键差分信号的传输性能进行了测试,在DC~40 GHz频段,差分信号的回波损耗≤-10.00 dB,插入损耗≥-2.50 dB,测试结果与仿真结果基本相符。

With the increasing demands for lightweight,miniaturization,high density and high reliability of the microsystem,highly integrated microsystem packaging substrate has attracted industry attention.Ceramic substrates for microsystem packaging were prepared by combing the multi-layer thin film process and multi-layer high temperature co-fired ceramic(HTCC)process.The line width of the thin film process can achieve 0.02 mm,and the line spacing can reach 0.02 mm,less than the 0.05 mm line width and 0.085 mm line spacing of the multi-layer HTCC substrate.The reliability of the substrate prepared by combining multi-layer HTCCs with multi-layer thin films was verified,and the results meet the requirements of the GJB 548C—2021 standard for welding and bonding.The transmission performance of the key differential signal was tested.In the DC-40 GHz frequency band,the return loss of the differential signal is≤-10.00 dB,while the insertion loss is≥-2.50 dB.The test results are basically consistent with the simulation results.