基于101.6 mm晶圆35 nm InP HEMT工艺的340 GHz低噪声放大器芯片研制

Preparation of a 340 GHz Low⁃noise Amplifier Based on 101.6 mm Wafer 35 nm InP HEMT Process

实现了在101.6 mm InP晶圆上制备35 nm的增强型InP高电子迁移率晶体管。通过InAs复合沟道外延结构设计,使得室温二维电子气迁移率面密度乘积达到4.2×10^(16)/(V·s)。采用了铂钛铂金埋栅工艺技术,典型器件最大跨导达到2900 mS/mm,电流增益截止频率达到460 GHz,最高振荡频率为720 GHz。同时研制出340 GHz低噪声放大器芯片,在310~350 GHz内小信号增益22~27 dB,噪声系数在8 dB以下。建立了340 GHz InP低噪声放大器芯片技术平台,为太赫兹低噪声单片微波集成电路的发展奠定基础。

Fabrication of 35 nm enhancement-mode InP high electron mobility transistors on 101.6 mm InP wafer was achieved.By utilizing InAs composite channel structure,the product of the room temperature two dimensional electron gas mobility and sheet density reached 4.2×10^(16)/(V·s).Using PtTiPtAu buried gate technology,the peak transconductance of the typical device reached 2900 mS/mm,the cutoff frequency reached 460 GHz,the maximum oscillation frequency reached 720 GHz.Meanwhile,a 340 GHz low-noise amplifier was prepared,with a small signal gain of 22-27 dB and a noise figure below 8 dB were achieved within the frequency range of 310-350 GHz.The technology platforms of 340 GHz InP low-noise amplifier were established,which paved the way for the developments of terahertz low-noise monolithic microwave integrated circuit.