摘要
近年来,芯片的集成度与复杂度不断提升,传统的RTL级设计方式逐渐难以胜任大规模的门级设计任务。因此,设计人员迫切需要更为高效的设计方法。本文基于BSV(Bluespec SystemVerilog)语言实现了一款支持多种模式的SPI模块,相对于传统设计语言,BSV依靠丰富的内置模块以及更高的抽象层次,使得设计更加注重行为级的描述,缩短了模块的集成与验证时间。经过仿真验证,BSV完成的设计模块能够很好的实现相应的逻辑功能。
In recent years,with the continuous enhancement of the integration and complexity of chips,the traditional RTL-level design method has gradually become unable to cope with large-scale gate-level design tasks.Therefore,designers urgently need a more efficient design method.This article implements an SPI module that supports various modes based on the BSV(Bluespec SystemVerilog)language.Compared with traditional design languages,BSV relies on rich built-in modules and a higher level of abstraction,which makes the design more focused on behavioral-level descriptions and shortens the integration and verification time of the module.After simulation verification,the design module completed by BSV can well implement the corresponding logical functions.
作者
黄雯华
曹睿
HUANG Wen-hua;CAO Rui(Hunan JinXin Electronic Technology Co.,Ltd.)
出处
《中国集成电路》
2024年第10期60-66,共7页
China lntegrated Circuit