基于不对称二极管桥忆阻器的混沌电路动力学分析及其FPGA实现研究

Dynamic analysis and FPGA implementation of memory resistive chaotic circuit based on asymmetric diode bridge

物理忆阻器具有不对称的磁滞回线,为了实现更接近这种特性的不对称行为,通过调整二极管桥忆阻器中单个桥臂上并联二极管的数量,提出了一种新的不对称二极管桥忆阻器模型。首先,建立了不对称二极管桥忆阻器模型并研究其电气特性。其次,将其与混沌电路相结合,建立了基于不对称二极管桥忆阻器的忆阻混沌电路模型,利用相图和分岔图等分析了系统随参数变化的动力学特性。随后,在PSpice软件上完成了电路仿真验证,与数值仿真相吻合。最后,在NI实验平台进行了硬件实验验证,结果与数值仿真、电路仿真结果基本一致。结果表明,在并联二极管数量增加时,不对称二极管桥忆阻器的磁滞曲线不对称性逐渐增加,并且由于系统结构上对称性的破坏,系统的正负初值产生了异步的演化趋势。

Physical memristors have asymmetric hysteresis loops.To achieve a more closely aligned asymmetric behavior,a model of asymmetric diode bridge memristor was proposed by adjusting the number of diodes connected in parallel to a single bridge arm.Firstly,a model was built for the asymmetric diode bridge memristor,and its electrical characteristics were investigated.Secondly,a amnesic chaotic circuit model was established based on asymmetric diode-bridge amnesia by combining it with chaotic circuit.The phase diagram and bifurcation diagram were used to analyze the dynamics of the system at different parameters.Subsequently,the circuit was simulated by PSpice software to corroborate with numerical simulation.Finally,experiment was carried out on NI experimental platform,where experimental results were basically consistent with the numerical and circuit simulation results.The results show that the asymmetry of the hysteresis curve of the asymmetric diode bridge memristor gradually increases when the number of parallel diodes increases,which produces an asynchronous evolution of the positive and negative initial values of the system as a result of symmetry breaking of the system structure.