用于成形寻峰电荷测量电路的全差分运放设计

Design of FDOA ASIC for Charge Measurement Circuit in Shaping and Peak Detection Method

放大成形结合数字寻峰的技术路线在粒子物理实验电荷测量中有着广泛的应用。由于高精度模数转换器大多是差分电压输入,基于提高测量精度、减小共模干扰等因素考虑,需要将放大成形后的单端信号转换为差分信号。为了满足粒子物理实验读出电子学高精度、低功耗、多通道等需求,定制化设计了一款全差分运放(Fully Differential Operational Amplifier,FDOA) ASIC(Application Specific Integrated Circuit,ASIC)。为了在较低的功耗下实现更大的压摆率和带负载能力,融合电流复用技术和AB类推挽放大器结构完成了FDOA ASIC的设计。基于180 nm CMOS工艺完成了电路的设计、仿真和流片。测试结果表明,该芯片的单通道功耗约为28.3 mW,压摆率约为745.4 V/μs,带负载能力约为±50 mA,噪声约为173μV,在20 MHz、2 Vpp的正弦波信号输入下实现了好于70 dB的总谐波失真。

The technical route of amplification & shaping and digital peak detection has been widely used in charge measurement in particle physics experiments.Since most high-precision Analog to Digital Converters are differential voltage inputs,it is necessary to convert the single ended signal after amplification & shaping into differential signal based on factors such as improving measurement accuracy and reducing common mode interference.In order to meet the requirements of high precision,low power consumption and multi-channel of readout electronics in particle physics experiments,a FDOA(Fully Differential Operational Amplifier) ASIC(Application Specific Integrated Circuit) is customized and designed.In order to achieve larger slew rate and load capacity with lower power consumption,the FDOA ASIC is designed by combining current multiplexing technology and class AB push-pull amplifier structure.Based on 180 nm CMOS process,the circuit design,simulation and streaming are completed.The test results show that the single channel power consumption of the chip is about 28.3 mW,and the slew rate is about 745.4 V/μs.The load capacity is about ±50 mA,the noise performance is about 173 μV.And the THD(Total Harmonic Distortion) is better than 70 dB under the signal input of 20 MHz and 2 Vpp.