芯片化继电保护装置中SoC配置存储器失效评估

Failure Assessment of SoC Configuration Memory in Chip-based Relay Protection

随着先进工艺SoC在继电保护领域越来越受重视,一些此前在该领域中未曾考虑过的问题亦引起研究人员的注意,如环境中高能粒子人射或者芯片封装中α粒子发射导致的先进工艺SoC单粒子效应问题。相较于传统继电保护系统,具有更高集成度、更强大运算能力和更小体积的SoC芯片化继电保护装置,在就地保护和分散式保护需求较高的线路中更具优势。虽然近年来基于ZYNO SoC的芯片化继电保护装置快速推进,但已有研究和应用中均未考虑芯片化继电保护装置中ZYNO SoC配置存储器的失效及加固处理问题,尤其是配置存储器单粒子效应可能导致继电保护装置功能失效,无法达到保护的目的。本文以一款可用于芯片化继电保护装置的ZYNO SoC为研究对象,采用软件故障注入的形式(分别基于SEM IP核和DPR两种方式进行了软件故障注入)评估了系统配置存储器发生单粒子效应时的可靠性。同时,结合失效模式与效应分析方法对两者的故障注入结果进行了对比,分析,指出针对芯片化继电保护装置中ZYNO SoC配置存储器,采用DPR的设计比采用SEM IP核的设计失效程度更低。

Advanced process system-on-chips(SoC)are increasingly vital in relay protection,revealing issues previously unconsidered.This includes the single event effects in SoC caused by high-energy particles or alpha particle emissions from chip packaging.Compared with traditional relay protection systems,SoC chip relay protection devices with higher integration,more powerful computing power and smaller size are more suitable for lines with higher requirements for local protection and distributed protection.Although chip-based relay protection devices based on ZYNQ SoC have gradually received attention in recent years,existing research and applications have not considered the failure and hardening of the ZYNQ SoC configuration memory in chip-based relay protection devices.In particular,the configuration memory single event effect may cause the relay protection device to malfunction and fail to achieve the purpose of protection.This study focuses on a ZYNQ SoC model suitable for such applications,employing software fault injection(software fault injection is based on SEMIP core and DPR)to analyze failure modes and effects.It was pointed out that for the SoC configuration memory in the chip relay protection device,the design using DPR has a lower failure degree than the design using SEM IP.