芯粒互连测试向量生成与测试方法研究

Research on Vector Generation and Testing Method for Chiplet Interconnection Testing

基于芯粒的2.5D和3D集成系统产品都具有大量的芯粒间互连,不可避免地会出现各种制造缺陷,互连测试对于提高2.5D和3D集成系统产品规模生产过程中的质量和产量至关重要。在研究传统的I-ATPG和真/补测试算法等互连测试方法的基础上提出了一种新的代码字编码方法,只需要4个代码字即可对所有矩形网络和六角网络进行代码字编码。设计了一种基于IEEE1838标准的芯粒集成系统测试架构,给出了一种典型的双芯粒互连电路并进行了测试和仿真验证,以系统性地介绍芯粒间互连测试技术。

Both 2.5D and 3D integrated system products based on Chiplet have a large number of Chiplet interconnections,which inevitably lead to various manufacturing defects.Interconnection testing is crucial to improving the quality and yield of 2.5D and 3D integrated system products during large-scale production.Based on the study of traditional interconnection testing methods such as I-ATPG and true/complement testing algorithm,a new code word encoding method is proposed,which only requires 4 code words to encode all rectangular and hexagonal networks.A test architecture of Chiplet integrated system based on IEEE1838 standard is designed,and a typical dual-Chiplet interconnection circuit is presented and tested and verified by simulation,so as to systematically introduce Chiplet interconnection testing technology.