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基于无源RFID的集成加速度传感器设计 被引量:2

Design of a Passive RFID-based Integrated Accelerometer
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摘要 针对射频识别技术(RFID)迅猛发展的需求,采用0.35μm CMOS工艺设计并制造了一种集成加速度传感器。加速度传感器单元利用基于深反应离子干法刻蚀的体硅正面加工工艺,在经过标准IC工艺之后进行两步干法刻蚀,工艺简单。集成接口电路采用了一种内部限幅的环形振荡器电路,将加速度传感器电容值转换为频率信号,并由计数器完成数字信号输出转换。后期测试结果显示,所设计的集成加速度传感器获得了良好的线性度和稳定性能,仅占用0.23mm2芯片面积,1.2V电源电压下消耗了1.4μW功率,尤其适合于无源RFID传感器标签设计中。 As for the rapid development of Radio Frequency IDentification(RFID),an integrated accelerometer using 0.35μm complementary metal oxide semiconductor process was presented.The accelerometer unit was fabricated by bulk silicon Deep Reactive Ion Etching(DRIE)and two steps of dry etching after the standard IC process,which was very simple.The sensor interface employs an internal-amplitude-limiting ring oscillator,converting the sensor capacitance to frequency signal,and then finishes the digital signal conversion using a counter.Measurement results show that the proposed integrated accelerometer achieves excellent linearity and stability.The proposed accelerometer covers 0.23mm2 chip area and consumes only 1.4μW power at 1.2V supply voltage,which proves to be especially suitable for passive RFID tag design.
出处 《固体电子学研究与进展》 CSCD 北大核心 2015年第3期289-295,共7页 Research & Progress of SSE
基金 国家杰出青年科学基金资助项目(50925727) 国防科技计划资助项目(C1120110004 9140A27020211DZ5102) 教育部科学技术研究重大资助项目(313018) 安徽省科技计划重点资助项目(1301022036) 湖南省科技计划资助项目(2010J4 2011JK2023) 江西省科技厅青年科学基金资助项目(20142BAB217008)
关键词 加速度传感器 射频识别标签 互补金属氧化物半导体工艺 接口电路 accelerometer RFID tag CMOS technology interface circuit
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参考文献5

  • 1Meng-Lieh SheuWei-Hung HsuLin-Jie Ts.A Capacitance-ratio-modulated Current Front-end Circuit With Pulsewidth Modulation Output for a Capacitive Sensor Interface. IEEE Transactions on Instrumentation and Measurement . 2012
  • 2Sun, Chih-Ming,Tsai, Ming-Han,Liu, Yu-Chia,Fang, Weileun.Implementation of a monolithic single proof-mass tri-axis accelerometer using CMOS-MEMS technique. IEEE Transactions on Electron Devices . 2010
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