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带单bit参考通道的TIADC时间失配校准 被引量:3

Calibration of Timing Skew for TIADC with a Single Bit Reference Channel
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摘要 提出了一种带单bit参考通道的校准算法,用于校准时间交织模数转换器(Time-interleaved analog-todigital converter,TIADC)的时间失配误差。该算法引入一条单bit的参考通道,其输出与TIADC子通道的输出进行相关运算获得误差信息,然后反馈到多相时钟产生器,形成反馈环路,达到校准的目的。该算法只引入了一条单bit的参考通道,硬件消耗低,对输入信号的频率没有限制,且可以扩展到任意通道数。算法应用于一个4通道12bits的TIADC,当输入信号归一化频率fin/fs=0.484 8时,MATLAB仿真结果表明,经本算法校准后SNR从14.39dB提高到73.92dB,证明了该校准方案的有效性。 A calibration algorithm with a single bit reference channel of timing mismatch for Time-Interleaved Analog-to-Digital Converter(TIADC)was presented.The algorithm added error information obtained by the related operations of the output of the single bit reference channel and TIADC sub-channel,to the multi-phase clock generator,in order to form a feedback loop for purpose of calibration.The presented calibration in this paper introduced only one single bit reference channel,which had low hardware consumption and no restriction on the input signal frequency,and could be extended to arbitrary number of channels.Simulations of a 4-channel 12-bit TIADC with MATLAB showed that,after calibration,the SNRrised from 14.39 dB to 73.92 dB at the input frequency f_(in)/f_s=0.484 8,verifying the effectiveness of the algorithm.
出处 《固体电子学研究与进展》 CAS CSCD 北大核心 2015年第6期586-590,共5页 Research & Progress of SSE
基金 中央高校基本科研业务费专项资金资助项目(2014HGCH0010)
关键词 参考通道 时间交织模数转换器 时间失配 reference channel time-interleaved ADC timing mismatch
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