一种应用于虚拟地闪存结构的读保护电路设计

A Read-protection Circuit Design for Virtual Ground Flash Memory Architecture

提出了一种新型的应用于虚拟地闪存结构的读保护电路,电路采用双电压读保护技术及位线压降跟踪技术减少侧边漏电。提出的读保护电路在0.09μm的嵌入式闪存平台上实现。测试结果表明:该读保护电路可以将侧边漏电控制在0.3μA以内。

A read-protection circuit was presented for the application of virtual ground flash memory.The circuit was featured with novel double reading voltages protecting architecture and bit-line voltage drop tracking technique to reduce side leakage.The circuit had been implemented in 0.09μm CMOS compatible embedded flash technology.Testing results show that the side leakage can be restricted within 0.3μA in the read-protection circuit.