基于SIMD的CFAR算法加速

CFAR algorithm acceleration based on SIMD

针对雷达信号处理领域中的恒虚警率(constant false alarm rate,CFAR)算法的广泛应用,在高性能DSP上实现CFAR算法的性能优化具有研究价值。首先阐述了CFAR算法在雷达信号处理流程中用来解决杂波背景数据的干扰问题的基本原理;其次给出了高性能DSP向量核的硬件架构设计,给出了流水排布优化、Cache预取等利于算法并行化运算的硬件优化实现方案;最后运用单指令多数据流(SIMD)指令对CFAR算法进行了重写优化。实验结果表明,设计的向量核模块与SIMD指令集使CFAR算法能够充分发挥处理器的计算性能,与C接口的CFAR算法相比可以大幅度缩小算法实现时间。

Aiming at the wide application of constant false alarm rate(CFAR) algorithm in the field of radar signal processing, it is of great research value to realize the performance optimization of CFAR algorithm on high performance DSP. Firstly, the basic principle of CFAR algorithm used to solve the interference problem of clutter background data in radar signal processing flow is expounded. Secondly, the hardware architecture design of high performance DSP vector core is given, and the pipeline layout optimization and Cache prefetch are given. The hardware optimization implementation scheme is advantageous for algorithm parallelization. Finally, the CFAR algorithm is rewritten and optimized by using single instruction multiple data stream(SIMD) instruction. The experimental results show that the designed vector kernel module and SIMD instruction set enable the CFAR algorithm to fully utilize the computing performance of the processor. Compared with the CFAR algorithm algorithm of the C interface, the algorithm implementation time can be greatly reduced.