高温CMOS集成电路闩锁效应分析

The Analysis of Latch Up Characteristics in High Temperature CMOS Integrated Circuits

本文详细地分析了LDD结构高温CMOS集成电路闩锁效应.文中提出了亚微米和深亚微米CMOS集成电路闩锁效应的模型.在该模型中,针对器件的尺寸和在芯片上分布情况,我们认为CMOS IC闩锁效应的维持电流有两种模式:大尺寸MOST的寄生双极晶体管是长基区,基区输运因子起主要作用;VLSI和ULSI中MOST的寄生双极晶体管是短基区,发射效率起主要作用.但是他们的维持电流都与温度是负指数幂关系.文章给出了这两种模式下的维持电流与温度关系,公式在25℃至300℃之间能与实验结果符合.

The paper has analyzed Latch-up characteristics in high temperature CMOS integrated circuits. In this paper, we propose a latch-up effect model for submicron and deep submicron integrated circuits. We find there are two sub-models about CMOS integrated circuit Latch-up effect.The base width of a parasitic transistor is long in a big size MOS IC,and the base transport factor dominates.The device size is small in VLSI and ULSI.The base width of a parasitic transistor is shorter, and emission efficiency dominates. But their holding currents are all negative index number power about temperatures. The paper has given relations between holding current and temperatures from 25℃ to 300℃ range. The experiment results are essential agreement with the model that the paper has given.