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槽栅IGBT硅化物自对准技术研究 被引量:2

Silicided Self-Aligned Study for Trench-Gate IGBTs
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摘要 本文设计了一种全自对准的槽栅 IGBT(绝缘栅双极晶体管 )结构 ,其工艺简单 ,全套工艺只有两张光刻版 ,是现有 IGBT工艺中最少的 ,而且两次光刻之间没有套刻关系 ,避免了套刻误差 ,提高了工艺成品率。同时 ,降低了制版费用和制造成本。设计了一种独特的 IGBT多重沟道短路结构 ,有效的防止闩锁。用氧化层硬掩膜和先进的硅化物工艺实现金属接触全自对准 ,可使元包尺寸减小到 2μm甚至更小 ,增加了 IGBT芯片单位面积的元包密度和沟道宽度 ,提高了电流 ,使器件导通电阻低于 0 .2 3mΩ / cm2 。用砷 (As)掺杂代替磷 (P) ,可有效提高源区表面浓度 ,实现浅结工艺。 In this article, a fully self aligned trench gate IGBTs(Insulated Gate Bipolar Transistors) with process simplification scheme is designed and fabricated with total of two masks which is the least of IGBT fabrication today. Meanwhile, the mask alignment is not needed between the two masks, eliminate the alignment error and increase the process yields, as the masks number decrease the device fabrication cost is decreasd. An unique multiple channel short structure is designed to effectively suppress the IGBT latch up. Poly Si etching back is self aligned with the pre oxidation layer as a hard mask. The gate and source is contacted fully self aligned and metal layer is automatic separated with the silicided technique of the advanced ULSI fabrication tricks. Hence, it can reduce the cell pitch size to be below 2 μm and a trenceh width of 1 μm, increase the packing density, channel width and current capability, decrease the on state resistance to smaller than 0.23 mΩ/cm\+2. Using arsenic(As) instead of phosphorus(P) as the source doping, the source surface concentration is effectively increased when shallow junction structure is employed.
出处 《电子器件》 CAS 2002年第4期420-423,共4页 Chinese Journal of Electron Devices
基金 国家自然科学基金 (60 0 3 60 16 5 0 0 770 16) 博士点基金 (CETD0 0 -10 )资助
关键词 IGBT 槽栅 全自对准 硅化物 多重沟道短路 绝缘栅双极晶体管 IGBT trench gate process fully self aligned silicided multiple channel short fabrication
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参考文献5

  • 1Florin Udrea, Gehan A J. Theoretical and Numerical Comparison between DMOS and Trench Technologies for Insulated Gate Bipolar Transistors[J ]. IEEE Trans on ED, 1995;42(7):1356-1366
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