降低DDS时钟发生器输出抖动的若干方法

Jitter Reduction in DDS Clock Generator Systems

本文主要介绍了DDS作为时钟发生器时的输出抖动情况以及减小时钟边沿拌动的几种方法，以保证获得良好输出抖动性能的措施。

This paper describes the edge jitter outputted from a DDS clock generator, put up.withsome ways to minimize the jitter and measures to be taken to secure the best jitter performance.