摘要
针对规模大而复杂的 VLSI( Very Large Scale Integrated- Circuit)提出了一种新的基于BIST( Built- In Self- Test)的故障诊断策略 .它通过对触发器阵列扫描 ,可同时找出有故障的 CUT( Circuit Under Test)和测试码以及与之相应的响应 ,从而能应用传统的非 BIST设计故障诊断方法来定位故障门 .它克服了传统基于 BIST故障诊断方法中数据量大 ,或者由于使用经过压缩处理的数据而带来的不确定性等缺点 .电路结构简单可行 ,提供的相应算法也易于实现 .
A novel fault diagnosis methodology based on BIST(built-in self-test) for large and complex VLSI(very large scale integrated-circuit) was proposed, which can find out the fault CUT (circuit under test), test pattern and the corresponding response at the same time through scanning the flip-flops matrix. It can locate the fault gate further by applying the traditional non-BIST fault diagnosis schemes. It overcomes the shortcomings of the traditional BIST-based fault diagnosis schemes, either too much data or uncertainty brought up by using the compacted data. The BIST structure circuit is simple and feasible, and the corresponding algorithm is easy to achieve.
出处
《上海交通大学学报》
EI
CAS
CSCD
北大核心
2002年第12期1713-1716,共4页
Journal of Shanghai Jiaotong University
基金
国家"九五"微电子重点科技攻关资助项目 (96-73 8-0 1-0 1)