高性能嵌入式系统应用中的容错结构

Fault-Tolerant Architecture for High Performance Embedded System Application

介绍一种容错嵌入式计算机系统的体系结构 ,主要阐述了高性能嵌入式系统 (HPEC)

The architecture of a fault-tolerant embedded computer system is presented in this paper.It mainly deals with the ability of fault self-checking for the high performance embedded system(HPEC)as well as the evaluation of HPEC reliability.