摘要
针对PowerPC处理器在嵌入式计算机系统中的可靠性应用,提出了PowerPC数据处理模块的看门狗电路设计方法。介绍了模块的系统结构,给出看门狗芯片的应用电路设计和逻辑实现的可编程看门狗定时器,设计简单灵活,可满足多种系统需求。
For the reliability application of PowerPC processor in embedded computer system,this paper proposed a watchdog circuit design method of PowerPC data processing module.The system structure of the module was described firstly in this paper.The application circuit design of watchdog chip and logic implementation of the programmable watchdog timer was given,which designed simple and flexible,and could meet the requirements of various system.
作者
刘博
强凯
詹思维
LIU Bo;QIANG Kai;ZHAN Si-wei(Xi'an Aeronautics Computing Technique Research Institute,AVIC,Xi'an 710068,China)
出处
《航空计算技术》
2019年第2期105-107,共3页
Aeronautical Computing Technique
基金
装备预研联合基金项目资助(6141B05060402)