双等比CMOS缓冲器的设计

Design of Dual Fix Tapered CMOS Buffer

双比CMOS缓冲器可分为双等比和双变比CMOS缓冲器。文章对双等比CMOS缓冲器进行了设计研究,提出了它的一种次优实现方法。双等比CMOS缓冲器容易取得对称的传播延迟,可以在较小的面积与功耗下取得和等比CMOS缓冲器相等的传播延迟。使用0.35μm工艺参数的HSPICE模拟结果证实了双等比CMOS缓冲器的性能。

A new tapering model,the dual tapered CMOS buffer where the N-channel and P-channel transistors are tapered with different fac-tors ,is proposed.In this model,there are dual fix tapered CMOS buffer and dual va riable tapered CMOS buffer clas-sified by the vari-ation of the width ratio of neighbor-hood in-verters.The design of the dual fix tapered CMOS buffer is i n-vestigated,and a near optimal im-plementation is constructed in this paper .With the dual fix tapered CMOS buffer,symmetrical propa-gation delay can be realized easily,and the propgation de-lay of a fix tapered CMOS buffer can be achieved with less area and power.The validation of this paper is made by HSPIC E simula-tion,using process parameters for a0.35um process.