基于Verilog HDL描述的10M/100Mbps以太网卡设计模块的测试方案

Testing Scheme about 10M/100Mbps Ethernet Card Design Module Based on Verilog HDL Description

利用 Verilog语言的特点 ,搭建测试平台 ,能够灵活地验证设计模块。本文提出了一种有效进行功能验证的方法 。

The testing scheme is presented to neatly verify the function of design module by constructing testbench and using Verilog HDL. To ensure the function and validity, an effective method for verification on functionality is described.