面向LiDAR应用的APD单片前端读出电路设计

Monolithic front-end readout circuit for LiDAR using APD detector

针对基于雪崩光电二极管(avalanche photodiode,APD)的激光雷达(light laser detection and ranging,LiDAR)应用需求,设计并实现了一款具有高集成度的模拟前端读出电路芯片。该芯片集成了高增益宽带跨阻放大器(transimpedance amplifier,TIA)、固定增益电压放大器、高速实时比较器以及低压差分信号(low voltage differential signaling,LVDS)接口电路等。高增益宽带跨阻放大器采用电阻反馈式结构,电压信号以伪差分信号的形式输出,抗干扰能力较强。固定增益电压放大器采用电阻反馈同相放大器结构。比较器利用未经补偿的开环放大器实现。读出电路采用LVDS输出,实现了与后端FPGA的互连,进一步提高了系统集成度。该芯片采用chrt 0.18μm工艺设计,面积约为0.9 mm×1.9 mm。在3.3 V供电电压下,测试结果显示跨阻增益为83.6 d BΩ,带宽为120 MHz,整体链路能对脉宽为5 ns的脉冲作出有效响应,LVDS输出电压符合FPGA接口要求。

A high integration density front-end readout circuit(ROIC)was presented and designed in allusion to the kind of light laser detection and ranging(LiDAR)using avalanche photodiode(APD)detector.The front-end readout circuit consisted of high-gain broadband transimpedance amplifier(TIA),fixed gain voltage amplifier,high-speed real-time comparator,low voltage differential signaling(LVDS)output interface et al.TIA adopted resistance feedback structure.The output voltage signal of TIA connected to next stage through the way of pseudo-difference signaling,therefore obtaining better antiinterference ability.Fixed gain voltage amplifier was a non-inverting amplifier with resistance feedback network.Then a decompensated open-loop amplifier was used for the comparator in the chip.The ROIC can connect with FPGA directly profiting from the LVDS,again improving the integration density of thechip.The circuit was designed with chrt 0.18μm process.The area of chip was about 0.9 mm×1.9 mm.The voltage of the power supply to the chip was 3.3 V.Through the test,the gain of TIA can achieve83.6 dBΩ,the bandwidth can reach 120 MHz.At the same time,the whole readout circuit can make an immediate response for input pulse signal with 5 ns pulse width.The LVDS which was designed as the output of whole readout circuit can meet the request of FPGA′s interface.