NAND闪存物理特征测试平台设计

NAND flash physical feature test platform design

设计了基于现场可编程门阵列(FPGA)的快速、准确且可扩展的自动化闪存测试平台,测试平台由主机图形用户界面(GUI)、FPGA控制器和NAND闪存子板组成,通过更换测试座可以适配不同封装和不同类型的NAND闪存芯片,一个FPGA控制器可同时完成8块闪存芯片测试.实验结果表明:当编程/擦除(P/E)操作重复100次时,16 MiB的多层单元闪存(MLC)块测试时间为146 s,8个闪存芯片块的测试时间为188 s.对于常见的闪存芯片,1 d内可完成一个闪存块的耐力测试.原始错误比特数、擦除时间和编程时间随着闪存寿命有规律地变化,读取时间与闪存寿命无明显关系.测试结果符合闪存原理特性,表明测试平台快速有效且并行性高.

In order to meet the needs of flash reliability research and endurance test,a fast,accurate and scalable automated flash test platform was designed and implemented based on field-programmable gate array(FPGA).The test platform was composed of graphical user interface(GUI),FPGA controller,NAND flash memory board which could be adapted to different packages and different types of NAND flash chips by replacing the test socket.A FPGA controller can test 8 flash chips simultaneously.The test results indicate that using the proposed fast test method,when the program/erase(P/E)operation is repeated 100,a 16 MiB MLC test time is 146 s,and the test time of 8 chips is 188 s.For a common flash chip,the endurance test of a flash block can be completed in1 d.The number of original error bits,erase time,and programming time change regularly with the life of flash memory,and the reading time has no obvious relation with the life of flash memory.The test results are in line with the characteristics of the flash memory,indicating that the test platform is fast and efficient.