摘要
提出了一种缩短设计周期、减小设计规模的HDTV接收芯片中均衡器的设计法。这种方法受到SoC 中IP 技术的启发,现已应用到芯片设计中。
A new method of implementing equalizer in HDTV which can sharply shorten designperiod and decrease design scale is proposed in this paper. This method is enlightened by IPtechnology applied in SoC. And this method is realized in our completed chip.
出处
《半导体技术》
CAS
CSCD
北大核心
2003年第2期21-23,28,共4页
Semiconductor Technology
关键词
HDTV
IP
判断反馈均衡器
高清晰度电视
知识产权
专用集成电路
decision feedback equalizer(DFE)
high definition television(HDTV)
intel-lectual property(IP)
application specific integrated circuit (ASIC)
